Comparing Debugging Methods For Embedded Software

Embedded-software development is one of essential parts of SOC designs. To choose the appropriate software verification method can often stand for the project’s success or failure.

Any system on chip has many components, like processors, timers, buses, memory, and embedded software. Its an end-to-end system, yet some years ago it would be assembled on a board, but now with respect to enhancement of semiconductor technology this all can seat on a single chip. Generic RTL-to-layout design-and-verification flow turns out to be inadequate for these multimillion-gate systems with added complicacy due to embedded software running on them. Developers have no the luxury of waiting for silicon based emulation board to launch software debugging. The appearance of virtual platforms enables designers to emulate hardware-component functions at higher abstraction level, that eases and simplifies the embedded software debugging. Virtual platforms provide the benefit of reduced development cost, always at hand, hardware-visualization features, and the ability to simulate erratic and non-conventional conditions.

Generally, virtual platforms is a much better solution as compared to conventional approaches to embedded software debugging with FPGA boards. But it is not acceptable to employ the single approach on different stages of the software-design cycle. Alternative is possible, regarding cost and usage patterns, application features and and time-to-market and -revenue expectations. Virtual prototypes can be used in functional testing, RTL simulation platform is useful with performance testing of low-level hardware drivers. Still, the final performance testing as well as acceptance testing must be performed on the silicon prototype of the product.

As the software-rich chips appear, the simulators and emulators architectural analysis and embedded software verification gain more and more importance. Developers responsibility extends to validation of performance and function of hardware as well as validation of embedded software on board these systems. Its often crucial to select the right prototyping method. One has to select from from hardware-based simulation to software-based simulation to perform testing. Available options for both hardware and software validation:

  • Functional testing implies development of functional/architectural prototypes (virtual platforms), which emulate hardware features.
  • RTL-based method relies on the techniques like cosimulation mechanisms and verification utilizing the dynamic model.
  • Architecture designers employ reconfigurable FPGA-based prototyping boards to verify a relevant piece of embedded software.
  • ASIC boards enable developers to verify the software on silicon.

Development time

As SOCs include complex embedded software, its essential to hold performance verification prior to silicon model implementation. Conventional hardware-simulation methods are deficient, as its time consuming to develop and validate the RTL models of IPs. Reconfigurable boards can not be built unless the RTL models are at hand. Functional models can be developed faster than the same RTL models.
Speed of Simulation

The speed of performing simulation is an essential criterion for embedded software testing. Embedded software testing must not be very time consuming not to hinder the engineer’s productivity in compiling, editing and debugging. Changing even the application software implies software compiling and system reboot, as one can not store and reload the system state at different checkpoints. Provided the simulation is delayed, as in the case with RTL-based platforms, every test can encompass only small parts of of software.

Accuracy of results

If modeling with dynamic models, designers trade accuracy for speed and easiness of debugging through utilizing generic workstations and servers. Accuracy is improved with using full-HDL or gate-level simulations, though execution speed decreases to the level when engineers are able to analyze only some parts of design in one test. FPGA-prototyping boards offer higher exactness with comprehensive speed of simulation, but they are not appropriate for verification of analog blocks and loosely support asynchronous modes of operations.

Cost should be considered as another factor of special attention, it encompasses development as well as deployment when you buy off-the-shelf IP from external vendors. Virtual platforms development specifically for software validation to cut the total development time and effort can add substantial expenses to the project. RTL models should be developed for FPGA-based prototyping boards and custom ASICs. From deployment perspective, the RTL-based cosimulation-platform method is cheaper because of minimal incremental cost of setting up the simulation environment. External vendors typically provide the RTL models of all the IP blocks they license, but the team of developers undertakes the expenses on models integration and hardware-prototyping boards assembling. The above activity can be expensive, making the strategy impracticable. We also face the excessive expenses when dealing with virtual platforms licensing or developing custom ASIC for embedded-software debugging.

The numbers vary with respect to the type and complexity of IP. Total cost of debugging an embedded application could be decreased through primary usage of virtual platforms and development of required number of prototyping boards further on to supply to virtual platforms.